台北市中山區
IC設計相關
類比IC設計工程師
面議（經常性薪資4萬含以上）
•Experience with PLL/CDR design including building blocks (VCO, charge pump, divider, etc.).
•Modeling of CDR and adaptive loops.
•Knowledge of ESD requirements.
•MS with 3+ year experience working on high speed SERDES circuits in advanced CMOS process nodes.
•Architecture experience with transceiver equalizers (TX FIR, RX analog FFE, CTLE, and DFE) – DSP (FFE and DFE)