任職資格

1.with ASIC controller team to modeling the interface

2.while silicon bring up, build the script that can be used for debug and ATE.

3.EE BG

4.3+ years of experience working in high-speed I/O digital design, knowledge at protocol level preferred (mipi,pcie,usb)

5.familiar with verilog or systemverilog, logic design and curcuit modeling in RTL for mixed-signal blocks

6.experience with custom digital circuit design and adaptation algorithms, such as DFE,CTLE,CDR and offset cancellation

*請利用下列兩種方式投遞履歷，若您的資格符合職缺所需，我們的獵頭顧問將會盡速與您聯繫 ，謝謝！