獵頭工作｜找職缺，就上Accurate愛客獵

資深數值企劃 (3010314)

台中市北區

遊戲電玩

遊戲企劃人員

面議（經常性薪資4萬含以上）

全職

● 熟悉遊戲開發流程。 ● 內外溝通： 1、與遊戲企劃功能開發的溝通。 2、與運營人員進行市場運營的溝通。【其他條件】 ● 具美感及節奏感 ● 良好溝通能力並富責任感 ● 二年以上手遊企劃經驗，且有完整的專案開發經歷 ● 具備數據建模能力，能獨立建構機率模型與 LTV（顧客終身價值）預測模型（熟悉 Excel / Python） ● 以客觀數據為基礎，拆解主流產品的設計邏輯與成功要素 ● 具備獨立負責多個企劃模組（如：數值、活動、系統等）的實戰經驗【加分項目】 ● 對創作遊戲和玩遊戲有濃厚的興趣

手遊企劃

獨立建構機率模型

CRM數據分析師 (高專~副理) (3010040)

台北市信義區

百貨相關

數據分析師／資料分析師

面議（經常性薪資4萬含以上）

全職

1.具客戶行為分析與應用相關經驗 2.具商業議題敏銳度者佳 3.具備統計知識假設檢定、機率、抽樣 4.熟悉資料探勘方法並具備結構化資料庫概念 5.具備邏輯及問題分析能力尤佳 6.具 SQL 程式語言能力 7.具 R、Python 等程式語言者佳 8.大學數理統計相關、一般商業學類、資訊工程相關科系畢 9.至少5年以上相關數據分析經驗

客戶行為分析

數據分析

車電V&V engineer(內湖) (3010291)

台北市內湖區

電腦╱週邊設備製造

軟體工程師

面議（經常性薪資4萬含以上）

全職

• Bachelor’s degree in Mechanical, Electrical, Automotive Engineering, Computer Science, or a related field. • 3+ years of experience in QA/V&V. • Proficiency in C/C++ and Shell Scripting for embedded Linux environments. • Experience in Linux Kernel, hardware I/O, and embedded system constraints. • Experience in debugging compiled code and analyzing system performance on target hardware. • Knowledge of functional safety and regulatory standards. • Fluent in English • Excellent communication and interpersonal skills, with a focus on collaboration and teamwork. Preferred Qualifications: • Experience with automotive SoC platforms (e.g., NVIDIA Orin, Qualcomm Snapdragon Ride) is a strong plus. • Familiarity with automotive standards such as ASPICE or ISO 26262. • Experience with HiL/SiL test platforms (e.g., dSPACE, NI, ETAS). • Experience with simulation and data analysis tools (MATLAB, CANoe, Python, etc.). • Experience with automated test frameworks and CI/CD for embedded systems • Experience working with high-bandwidth data (video, LiDAR, radar) and storage systems.

V&V工程師

車電System Test Engineer(內湖) (3010290)

台北市內湖區

電腦╱週邊設備製造

測試工程師

面議（經常性薪資4萬含以上）

全職

• Bachelor’s degree in Mechanical, Electrical, Automotive Engineering, Computer Science, or a related field. • 1–3 years of experience in automotive testing, data acquisition, or related field (internships included). • Hands-on experience with vehicle instrumentation, sensor integration, and data logging tools (e.g., OxTS, NI, Dewesoft, CANape, CANalyzer, or similar). • Understanding of automotive communication protocols (e.g., CAN, LIN, Ethernet, FlexRay). • Valid driver’s license with a clean driving record; experience with proving grounds or test tracks is a plus. • Strong troubleshooting and problem-solving skills. • Basic scripting or programming skills (Python, MATLAB, etc.) are a plus. • Ability to work independently and travel for field tests if required. • Good knowledge and/or practical experience in test case and test scenario specification for ADAS systems; competence in requirement engineering • Fluent in English • Excellent communication and interpersonal skills, with a focus on collaboration and teamwork. • Ability to travel to customer sites, suppliers' facilities, or other locations as required. 【Preferred Qualifications】: • Experience with ADAS/AV sensor setups and synchronized multi-sensor data collection. • Familiarity with data management practices and metadata tagging. • Experience working with high-bandwidth data (video, LiDAR, radar) and storage systems. • Exposure to functional safety or automotive standards (e.g., ISO 26262, ASPICE).

測試工程師

伺服器診斷軟體開發經理 (Server Diagnostic Development Manager)(內湖) (3010288)

台北市內湖區

電腦╱週邊設備製造

軟體專案主管

面議（經常性薪資4萬含以上）

全職

1. 熟悉 X86 系統架構（Intel / AMD Platform） 2. 具備 Server Driver 或 Embedded System 開發經驗 3. 熟悉 Linux 開發環境 4. 熟悉 C / C++ / Python 5. 具備良好程式設計、除錯與問題分析能力 6. 具備專案管理或小型團隊帶領經驗 7. 具備英文閱讀與基本溝通能力 8. 資工、資電、電子、電機等相關科系學士以上 9. 8 年以上相關工作經驗加分條件: 具備以下任一領域相關開發經驗尤佳 • CPU / DIMM / Flash • Ethernet / SAS / NVMe • GPU Driver / Application • Switch 或相關系統開發 • Validation / Test Tool 開發經驗 • Automation Tool Development 經驗

熟悉X86系統架構

熟悉Linux開發

伺服器診斷系統架構經理（Server Diagnostic Architect Manager）（內湖） (3010287)

台北市內湖區

電腦╱週邊設備製造

軟體專案主管

面議（經常性薪資4萬含以上）

全職

1. 熟悉 X86 系統架構（Intel / AMD Platform） 2. 具備 Server Driver、Firmware、Embedded System 或底層系統開發經驗 3. 熟悉 Linux 系統開發環境 4. 精通 C / C++ / Python 5. 具大型平台或系統架構設計經驗 6. 具技術決策與跨團隊技術領導能力 7. 具良好英文口語與書寫能力 8. 資工、資電、電子、電機相關科系學士以上 9. 10 年以上相關工作經驗加分條件: 具備以下任一領域之架構或開發經驗尤佳： • CPU / DIMM / Flash • Ethernet / SAS / NVMe • GPU Driver / Firmware • Switch 或 Datacenter 相關系統 • Diagnostic Automation / Validation Framework 開發經驗 • Server Validation Platform Architecture 經驗

熟悉X86系統架構

熟悉Linux系統開發

Sr Analog Circuit Design Engineer-Highspeed IO Buffer LPDDR6 (3010254)

新竹市東區

IC設計相關

類比IC設計工程師

面議（經常性薪資4萬含以上）

全職

•BS or MS in Electrical/Electronics Engineering or related field. •Typically 5+ years of relevant experience in analog/mixed-signal IC design, with emphasis on high-speed I/O or memory interface circuits. •Strong fundamentals in CMOS device operation, analog circuit design, feedback and stability, noise/jitter analysis, and deep-submicron effects. •Hands-on experience designing high-speed TX/RX buffers, termination and impedance calibration circuits, and voltage-domain level shifters. •Proficiency with industry-standard design tools, typically including Cadence Virtuoso, Spectre/ADE or HSPICE, and post-layout extraction flows. •Ability to clearly communicate design intent, document trade-offs, and drive results in a cross-functional environment. •Basic written English proficiency required. Candidates must be able to read and write emails in simple English to communicate effectively with non-Mandarin-speaking colleagues. Preferred / Nice-to-Have Experience •Experience with memory or high-speed interface protocols such as LPDDR, DDR, HBM, or similar interfaces. •Experience with post-layout sign-off, EM/IR analysis, and reliability-aware analog design. •Familiarity with signal integrity concepts, channel effects, and interaction between I/O circuits and package/channel parasitics. •Experience supporting silicon validation, ATE characterization, and simulation-to-silicon correlation. •Scripting or automation experience using Python, SKILL, Verilog-A, or similar for simulation regression and result analysis.

LPDDR6

類比緩衝電路

Sr Analog Circuit Design Engineer-Highspeed IO (3010253)

台北市中正區

IC設計相關

類比IC設計工程師

面議（經常性薪資4萬含以上）

全職

•BS/MS in Electrical/Electronics Engineering (or related). •Typically 7-10+ years of relevant experience in analog/mixed-signal IC design. •Strong fundamentals in CMOS device operation, analog design, feedback/stability, noise/jitter, and deep-submicron effects. •Proficiency with industry-standard tools (typical): Cadence Virtuoso, Spectre/ADE or HSPICE; plus modeling/scripting (e.g., Verilog-A/SystemVerilog, Python) as needed by the domain. •Ability to communicate clearly, document design decisions, and drive results in a cross-functional environment. Preferred / Nice-to-Have Experience •Experience with any high-speed interface protocols is a plus (e.g., DDR/LPDDR, HBM, UCIe, MIPI, LVDS).

高速 I/O

類比設計

Sr Analog Circuit Design Engineer-PLL Clocking (3010252)

新竹市東區

IC設計相關

類比IC設計工程師

面議（經常性薪資4萬含以上）

全職

•BS/MS in Electrical/Electronics Engineering (or related). •Typically 7-10+ years of relevant experience in analog/mixed-signal IC design. •Strong fundamentals in CMOS device operation, analog design, feedback/stability, noise/jitter, and deep-submicron effects. •Proficiency with industry-standard tools (typical): Cadence Virtuoso, Spectre/ADE or HSPICE; plus modeling/scripting (e.g., Verilog-A/SystemVerilog, Python) as needed by the domain. •Ability to communicate clearly, document design decisions, and drive results in a cross-functional environment. Preferred / Nice-to-Have Experience •Experience with any high-speed interface protocols is a plus (e.g., DDR/LPDDR, HBM, UCIe, MIPI, LVDS).

混合訊號電路設計

類比設計

Sr Analog Circuit Design Engineer-pure analog (3010251)

新竹市東區

IC設計相關

類比IC設計工程師

面議（經常性薪資4萬含以上）

全職

•BS/MS in Electrical/Electronics Engineering (or related). •Typically 7-10+ years of relevant experience in analog/mixed-signal IC design. •Strong fundamentals in CMOS device operation, analog design, feedback/stability, noise/jitter, and deep-submicron effects. •Proficiency with industry-standard tools (typical): Cadence Virtuoso, Spectre/ADE or HSPICE; plus modeling/scripting (e.g., Verilog-A/SystemVerilog, Python) as needed by the domain. •Ability to communicate clearly, document design decisions, and drive results in a cross-functional environment. Preferred / Nice-to-Have Experience •Experience with any high-speed interface protocols is a plus (e.g., DDR/LPDDR, HBM, UCIe, MIPI, LVDS).

電路設計工程師

類比工程師